Commit 89ecbdb2 authored by Alisson Claudino's avatar Alisson Claudino

ADD: Current Amplifier Complete PCB Design

parent 1375265a
......@@ -71,26 +71,6 @@ X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# CONN_01X01
#
DEF CONN_01X01 P 0 40 Y N 1 F N
F0 "P" 0 100 50 H V C CNN
F1 "CONN_01X01" 100 0 50 V V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
Pin_Header_Straight_1X01
Pin_Header_Angled_1X01
Socket_Strip_Straight_1X01
Socket_Strip_Angled_1X01
$ENDFPLIST
DRAW
S -50 5 10 -5 0 1 0 N
S -50 50 50 -50 0 1 0 N
X P1 1 -200 0 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_01X02
#
DEF CONN_01X02 P 0 40 Y N 1 F N
......@@ -113,6 +93,30 @@ X P2 2 -200 -50 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_01X03
#
DEF CONN_01X03 P 0 40 Y N 1 F N
F0 "P" 0 200 50 H V C CNN
F1 "CONN_01X03" 100 0 50 V V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
Pin_Header_Straight_1X03
Pin_Header_Angled_1X03
Socket_Strip_Straight_1X03
Socket_Strip_Angled_1X03
$ENDFPLIST
DRAW
S -50 -95 10 -105 0 1 0 N
S -50 5 10 -5 0 1 0 N
S -50 105 10 95 0 1 0 N
S -50 150 50 -150 0 1 0 N
X P1 1 -200 100 150 R 50 50 1 1 P
X P2 2 -200 0 150 R 50 50 1 1 P
X P3 3 -200 -100 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CP
#
DEF CP C 0 10 N Y 1 F N
......
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update=Ter 02 Jan 2018 10:15:45 -02
update=Seg 26 Fev 2018 12:14:02 -03
version=1
last_client=kicad
[pcbnew]
......@@ -115,8 +115,6 @@ LibName85=w_vacuum
LibName86=Xicor
LibName87=xilinx
LibName88=Zilog
[general]
version=1
[schematic_editor]
version=1
PageLayoutDescrFile=
......@@ -127,3 +125,5 @@ NetFmtName=
SpiceForceRefPrefix=0
SpiceUseNetNumbers=0
LabSize=60
[general]
version=1
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